SOT-Based MRAM Design At 7nm....

(Semiconductor Engineering, Oct. 30) Inel and Georgia Tech teamed up to present a comprehensive spin-orbit torque (SOT) based random access memory (MRAM) design at the 7nm technology node, spanning from device-level characteristics to system-level power performance area (PPA). At the device-level, we show the trade-offs among the write current, error rate, and time, based on mircomagnetic simulations (See link for details).

https://semiengineering.com/sot-based-mram-design-at-7nm-georgia-tech-intel/